MIT 6.111 (Digital Systems Laboratory) Project Fall 2014
S. Jain J. Thomas G. Ajjanagadde
Projector tilt auto-compensation system, implemented in Verilog on a Xilinx Virtex II FPGA system.
For related work and a nice extension of this project, please see: https://github.com/mhollands/6.111-final-project.