esp32p4 spi 4 line mode host function too slowly (EHM-27) #25
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Are you using https://github.com/espressif/esp-hosted or Sate the sdkconfig, spi clock in use and raw transfer speed (in both directions) |
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@skylin008 let us know some details to understand the issue better.. |
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@mantriyogesh Thanks for you support. Yes, I used the https, esp32c5 for spi slave , and esp32p4 for spi master. I used the FTP protocol transfer file. Attach esp32c5 and esp32p4 sdkconfig |
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The file you uploaded , could not complete. Can you please state if your normal functionality is working. The issue is only in download speed. 1MiB, meaning around 8-8.5mbps speed. This is limited by the clock. What is the SPI actual clock on the clock line? Also, can you please click a photo how you connected the p4 and c5? |
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@mantriyogesh thanks for your support, I will be try! |
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@mantriyogesh I had try to QSPI communication between esp32c5 and esp32p4 , esp32p4 io port define as follow: 
esp32c5 io port define as follow: 
Run the examples/wifi/getting-started/station example, any issue shows, attach the logs: the sdkconfig as bellow: |
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Can you please click a photo how your connections look like? |
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thanks @mantriyogesh ESP32P4 ESP32C5 attach the shematic |
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I wanted to see the photo, not schematic.. How are you connecting the QSPI? PCB or jumper cables? |
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From Ours had designed a PCB . ESP32P4 GPIO PIN <-------> ESP32C5 GPIO PIN |
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@skylin008 I tested the QSPI between the ESP32-P4 and ESP32-C5. Here are my findings: My HW setup: 
This is the ESP32-P4 Function EV Board. Connected to the GPIO header on the P4 board is a board with a ESP32-C5-WROOM-1 module. The board on the left is a ESP-Prog used to flash firmware to the ESP32-C5. My QSPI GPIO settings on the C5 slave: 
My QSPI GPIO settings on the P4 host: 
The SPI CLK is set to 40 MHz. I ran the iperf example program and these are the results I got P4 as iperf TCP server: P4 as iperf UDP server: P4 as iperf TCP client: P4 as iperf UDP client: For your reference, here are my sdkconfig files: |
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We can't exactly test your used GPIOs, but we verified with the board with us, the QSPI is working without issues. To add up, we also faced the issue of the message not receiving in our QSPI, when we used the jumper wires setup. although, the same issue was not observed when we used wires and 'dualSPI'. With QSPI over PCB, however such issue was not discovered. Suggestions:
If you need, we can share out schematic over mail. Please find my mail id on the profile. |
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@mantriyogesh SPI test is ok, the clock is 40Mhz, none error information shows. |
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@skylin008 Any updates? |
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@mantriyogesh Thanks for your kindly support. The same issue shows, it can't work correctly, it crash and reboot! |
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Attach the ESP32P4 logs 
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Check if you have connected the pins correctly. Also ensure the slave 'EN' is connected to your reset pin in the P4 and the C5 gets resets every time the P4 is reset. There are some suggestions mentioned in here: #25 (comment) As you say, the SPI test is okay, you can use same pins to test dual SPI first. But anyway, these jumpers are only for getting C5 into download mode, nothing to do with QSPI. the QSPI pins are through PCB. At the lease, did you try dual SPI or QSPI with lower frequency like 5MHz? Apart from this, In prior sdkconfig of the Full-Duplex SPI, I could see ESP32-P4 mapped to: ESP32-C5 These pins map to all your pins mentioned in #25 (comment) except, In your recent pins, you mentioned GPIO1 in P4 connected to GPIO7 in C5. I am confused, which one is correct and real mapping in your schematic. |
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Thanks @mantriyogesh , esp32c5 GPIO1 pin to connected to esp32p4 GPIO1 pin in my shematic. I had test the same pin in Full-Duplex SPI, it work ok. For Half-Duplex SPI mode, esp32p4 only add GPIO15 pin to connect esp32c5 GPIO7 pin. |
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Try QSPI with correct gpios with low freq： test fail esp32c5 debug info_dual spi.txt sdkconfig file follow below: sdkconfig_for_host_dualspi.txt |
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did the standard SPI with these pins worked for you any time? |
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in your logs, I can clearly see The extconn and esp-hosted cannot work together. Please disable extconn as described in the documentation: |
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did the standard SPI with these pins worked for you any time? Yes """The extconn and esp-hosted cannot work together. Please disable extconn as described in the documentation: https://github.com/espressif/esp-hosted-mcu/blob/main/docs/spi_full_duplex.md#3-remove-conflicting-configuration |
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Currently in the log, It look likes the message exchange for some commands was already successful So the QSPI at hardware level seems to be okay. The crash in slave times out the host for the command. Kindly wait from us to check on this and get back. We will test again and confirm. By the time, Can you please confirm:
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I just tested with the ESP32C5-board on the ESP32-P4 Dev Kit, and the logs look ok. On the ESP32C5 side, I do not see a crash after the See attached debug log output |
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Still something is mismatched between us and @skylin008 's either hardware, or software. As you state full duplex spi works fine, but QSPI doesn't. Let me compare the schematic in #25 (comment) with ours. |
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@skylin008 , As you have core dump shared already, can you please send us the c5 binaries and related files to debug the core dump at c5? Alternative 1) use Are you using Alternative 2) collect files manually and send to use for finding the line where it crashed cd <slave_c5_proj>/build
You can also run below script and get us c5_core_bundle.tgz Please note:
possibly, you can also provide similar set of files for P4 |
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@skylin008 , can you please attach the necessary files for crash dump analysis as mentioned above or use IDF.py monitor to get crash log? |
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Thanks @mantriyogesh , attach the p4 logs and c5 logs from idf.py monitor |
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I am quite surprised to see that C5 despite being slave, shows the log similar to 'host'. For reference successful logs, please refer: #25 (comment) Are you flashing host on C5 and P4 both? I also compared your old logs. In the old logs, I can see that you were flashing C5 from slave project.
The recent log you attached for c5 is not correct. Possibly, you are either flashing host on both C5 & P4 (likely), or you are accessing wrong uart port for logs (unlikely). Can you please create a new project using: where, x.y.z is same to one displayed in your ESP32-P4 log while flashing. Ensure that you create slave project outside of the esp-idf directory tree? |
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Thanks @mantriyogesh, I'm back from vacation. Attatch the latest c5 logs and p4 logs from idf.py monitor. |
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Great. Thanks for the logs with backtrace in slave side. In the slave log confirms that the slave has crashed clearly and host awaited for the request, which it got failure and was marked as Fatal, resulting abort at host. Now, as I see the crash is null pointer access and in some bluetooth function and embedtls. My first and very clear guess is that you are using c5 with 0.0 version. The c5 with eco1(1.0+) are only supported on latest IDF and older c5 get crash with latest IDF. Considering the c5 is not MP yet, these chip revisions are expected. Please note these are hardware revisions, so in worst case you might go back to older IDF commit (unsure which right now), but basically without IDF software support (till some commits it would work, no later), as this chip hardware is deprecated (anyway C5 is not in MP yet). I also checked/confirmed from your log of eFuse that the chip is 0.0. you can alternatively run esptool.py with chip_id argument. Please let us know if this c5 is eco1 or later. |
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idf commit, as I found out, espressif/esp-idf@d092c1b Any C5 eco0 (0.0) c5 would not be able to work ahead this. alternatively, you can also see the idf flashing log, which would contain string The above trace only holds true for c5 eco1 devices. |
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@skylin008 please let us know further, once you have some observation.. |
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Thanks@mantriyogesh, I will be try! If eco0 firmware can be used eco1 devices? |
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yes. If you can wait a little (unsure how much), you can also try to use eco2 directly. Other way around, you can actually downgrade to specific commit in idf and try on existing device, if you are going to wait for eco2. Also, it would rule out the issue is indeed only because of the hardware incompatibility. Anyway, eco1 is supported on IDF master. |
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@mantriyogesh Thanks for your support! when esp-hosted update to 1.1.2：slave, used eco0 chip, the esp32C5 module keeps restarting approximately every 1 second when used SPI_FULL_DUPLEX. But when used esp-hosted 0.0.22:slave, it can be worked. |
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It would be helpful if you attach both side for quicker resolution on lastest slave. Please also let us know the IDF version in use and all submodules are updated in the esp-idf directory. Please be informed, if the issue happens in IDF driver(s), there is no way we can support the c5 eco. However if the issue is in hosted, we can certainly fix. |
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The esp-hosted version is: 1.1.2 ，esp-idf version is: ESP-IDF v5.5-dev-847-gcb3ac7429c-dirty, two versions used to eco0 esp32c5 chip can be work well, but them used to the eco1 esp32c5 chip can not be work, esp32c5 can not communication with esp32p4. The above work with SPI_FULL_DUPLEX. |
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espressif/esp-idf@cb3ac7429c > espressif/esp-idf@d092c1b . should not be used on eco0. if it works, mere co-incidence. Irrespective of transport, please stick with commits. The commits are software, but they are tied to specific hardware. commit < espressif/esp-idf@d092c1b => eco0 |
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what about issue about eco1 can not be communication with each other? |
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Sorry did not understand what exactly you meant can you please detail a bit? |
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The esp-hosted version is: 1.1.2 ，esp-idf version is: ESP-IDF v5.5-dev-847-gcb3ac7429c-dirty, two versions used to eco0 esp32c5 chip can be work well, but them used to the eco1 esp32c5 chip can not be work, esp32c5 can not communication with esp32p4. How about solve eco1 communication issue? |
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Now esp32c5-wroom ECO1 chip can not be work, can not be flash_download, but ECO0 chip work well. |
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Sorry, but without the necessary logs and specific information, we cannot proceed to even understand the issue. |
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@skylin008 From the The P4 is unable to reset the C5. I do not see the C5 rebooting in the Please check that the P4 GPIO used (GPIO 17) is properly connected to the pin used to reset the C5. Also, the logs indicate that you are running with SPI FD (full duplex) not SPI 4-line mode (SPI half duplex). This is the correct SPI mode? From From |
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@SohKamYung-Espressif Thanks! Yes, I used stand SPI full duplex to run with esp32C5 ECO1 chip. |
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@skylin008 Do you have any updates on the esp32C5 ECO1 chip? |
Checklist
Feature description
esp32p4 spi 4 line function, used 40M clock, max speed only 1 MiB, does it can be 5 MiB reachable.
Use cases
esp32p4 connect esp32c5 wifi module via SPI 4 Line mode, used FTP protocol download file from FTP server via esp32c5 wifi，it only 1 MiB download speed , how to solve this issue. Thanks!
Alternatives
None
Additional context
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