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rewriteMIPS.go
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// Code generated from gen/MIPS.rules; DO NOT EDIT.
// generated with: cd gen; go run *.go
package ssa
import "math"
import "github.com/bjwbell/cmd/obj"
var _ = math.MinInt8 // in case not otherwise used
var _ = obj.ANOP // in case not otherwise used
func rewriteValueMIPS(v *Value) bool {
switch v.Op {
case OpAdd16:
return rewriteValueMIPS_OpAdd16(v)
case OpAdd32:
return rewriteValueMIPS_OpAdd32(v)
case OpAdd32F:
return rewriteValueMIPS_OpAdd32F(v)
case OpAdd32withcarry:
return rewriteValueMIPS_OpAdd32withcarry(v)
case OpAdd64F:
return rewriteValueMIPS_OpAdd64F(v)
case OpAdd8:
return rewriteValueMIPS_OpAdd8(v)
case OpAddPtr:
return rewriteValueMIPS_OpAddPtr(v)
case OpAddr:
return rewriteValueMIPS_OpAddr(v)
case OpAnd16:
return rewriteValueMIPS_OpAnd16(v)
case OpAnd32:
return rewriteValueMIPS_OpAnd32(v)
case OpAnd8:
return rewriteValueMIPS_OpAnd8(v)
case OpAndB:
return rewriteValueMIPS_OpAndB(v)
case OpAtomicAdd32:
return rewriteValueMIPS_OpAtomicAdd32(v)
case OpAtomicAnd8:
return rewriteValueMIPS_OpAtomicAnd8(v)
case OpAtomicCompareAndSwap32:
return rewriteValueMIPS_OpAtomicCompareAndSwap32(v)
case OpAtomicExchange32:
return rewriteValueMIPS_OpAtomicExchange32(v)
case OpAtomicLoad32:
return rewriteValueMIPS_OpAtomicLoad32(v)
case OpAtomicLoadPtr:
return rewriteValueMIPS_OpAtomicLoadPtr(v)
case OpAtomicOr8:
return rewriteValueMIPS_OpAtomicOr8(v)
case OpAtomicStore32:
return rewriteValueMIPS_OpAtomicStore32(v)
case OpAtomicStorePtrNoWB:
return rewriteValueMIPS_OpAtomicStorePtrNoWB(v)
case OpAvg32u:
return rewriteValueMIPS_OpAvg32u(v)
case OpBitLen32:
return rewriteValueMIPS_OpBitLen32(v)
case OpClosureCall:
return rewriteValueMIPS_OpClosureCall(v)
case OpCom16:
return rewriteValueMIPS_OpCom16(v)
case OpCom32:
return rewriteValueMIPS_OpCom32(v)
case OpCom8:
return rewriteValueMIPS_OpCom8(v)
case OpConst16:
return rewriteValueMIPS_OpConst16(v)
case OpConst32:
return rewriteValueMIPS_OpConst32(v)
case OpConst32F:
return rewriteValueMIPS_OpConst32F(v)
case OpConst64F:
return rewriteValueMIPS_OpConst64F(v)
case OpConst8:
return rewriteValueMIPS_OpConst8(v)
case OpConstBool:
return rewriteValueMIPS_OpConstBool(v)
case OpConstNil:
return rewriteValueMIPS_OpConstNil(v)
case OpConvert:
return rewriteValueMIPS_OpConvert(v)
case OpCtz32:
return rewriteValueMIPS_OpCtz32(v)
case OpCvt32Fto32:
return rewriteValueMIPS_OpCvt32Fto32(v)
case OpCvt32Fto64F:
return rewriteValueMIPS_OpCvt32Fto64F(v)
case OpCvt32to32F:
return rewriteValueMIPS_OpCvt32to32F(v)
case OpCvt32to64F:
return rewriteValueMIPS_OpCvt32to64F(v)
case OpCvt64Fto32:
return rewriteValueMIPS_OpCvt64Fto32(v)
case OpCvt64Fto32F:
return rewriteValueMIPS_OpCvt64Fto32F(v)
case OpDiv16:
return rewriteValueMIPS_OpDiv16(v)
case OpDiv16u:
return rewriteValueMIPS_OpDiv16u(v)
case OpDiv32:
return rewriteValueMIPS_OpDiv32(v)
case OpDiv32F:
return rewriteValueMIPS_OpDiv32F(v)
case OpDiv32u:
return rewriteValueMIPS_OpDiv32u(v)
case OpDiv64F:
return rewriteValueMIPS_OpDiv64F(v)
case OpDiv8:
return rewriteValueMIPS_OpDiv8(v)
case OpDiv8u:
return rewriteValueMIPS_OpDiv8u(v)
case OpEq16:
return rewriteValueMIPS_OpEq16(v)
case OpEq32:
return rewriteValueMIPS_OpEq32(v)
case OpEq32F:
return rewriteValueMIPS_OpEq32F(v)
case OpEq64F:
return rewriteValueMIPS_OpEq64F(v)
case OpEq8:
return rewriteValueMIPS_OpEq8(v)
case OpEqB:
return rewriteValueMIPS_OpEqB(v)
case OpEqPtr:
return rewriteValueMIPS_OpEqPtr(v)
case OpGeq16:
return rewriteValueMIPS_OpGeq16(v)
case OpGeq16U:
return rewriteValueMIPS_OpGeq16U(v)
case OpGeq32:
return rewriteValueMIPS_OpGeq32(v)
case OpGeq32F:
return rewriteValueMIPS_OpGeq32F(v)
case OpGeq32U:
return rewriteValueMIPS_OpGeq32U(v)
case OpGeq64F:
return rewriteValueMIPS_OpGeq64F(v)
case OpGeq8:
return rewriteValueMIPS_OpGeq8(v)
case OpGeq8U:
return rewriteValueMIPS_OpGeq8U(v)
case OpGetClosurePtr:
return rewriteValueMIPS_OpGetClosurePtr(v)
case OpGreater16:
return rewriteValueMIPS_OpGreater16(v)
case OpGreater16U:
return rewriteValueMIPS_OpGreater16U(v)
case OpGreater32:
return rewriteValueMIPS_OpGreater32(v)
case OpGreater32F:
return rewriteValueMIPS_OpGreater32F(v)
case OpGreater32U:
return rewriteValueMIPS_OpGreater32U(v)
case OpGreater64F:
return rewriteValueMIPS_OpGreater64F(v)
case OpGreater8:
return rewriteValueMIPS_OpGreater8(v)
case OpGreater8U:
return rewriteValueMIPS_OpGreater8U(v)
case OpHmul32:
return rewriteValueMIPS_OpHmul32(v)
case OpHmul32u:
return rewriteValueMIPS_OpHmul32u(v)
case OpInterCall:
return rewriteValueMIPS_OpInterCall(v)
case OpIsInBounds:
return rewriteValueMIPS_OpIsInBounds(v)
case OpIsNonNil:
return rewriteValueMIPS_OpIsNonNil(v)
case OpIsSliceInBounds:
return rewriteValueMIPS_OpIsSliceInBounds(v)
case OpLeq16:
return rewriteValueMIPS_OpLeq16(v)
case OpLeq16U:
return rewriteValueMIPS_OpLeq16U(v)
case OpLeq32:
return rewriteValueMIPS_OpLeq32(v)
case OpLeq32F:
return rewriteValueMIPS_OpLeq32F(v)
case OpLeq32U:
return rewriteValueMIPS_OpLeq32U(v)
case OpLeq64F:
return rewriteValueMIPS_OpLeq64F(v)
case OpLeq8:
return rewriteValueMIPS_OpLeq8(v)
case OpLeq8U:
return rewriteValueMIPS_OpLeq8U(v)
case OpLess16:
return rewriteValueMIPS_OpLess16(v)
case OpLess16U:
return rewriteValueMIPS_OpLess16U(v)
case OpLess32:
return rewriteValueMIPS_OpLess32(v)
case OpLess32F:
return rewriteValueMIPS_OpLess32F(v)
case OpLess32U:
return rewriteValueMIPS_OpLess32U(v)
case OpLess64F:
return rewriteValueMIPS_OpLess64F(v)
case OpLess8:
return rewriteValueMIPS_OpLess8(v)
case OpLess8U:
return rewriteValueMIPS_OpLess8U(v)
case OpLoad:
return rewriteValueMIPS_OpLoad(v)
case OpLsh16x16:
return rewriteValueMIPS_OpLsh16x16(v)
case OpLsh16x32:
return rewriteValueMIPS_OpLsh16x32(v)
case OpLsh16x64:
return rewriteValueMIPS_OpLsh16x64(v)
case OpLsh16x8:
return rewriteValueMIPS_OpLsh16x8(v)
case OpLsh32x16:
return rewriteValueMIPS_OpLsh32x16(v)
case OpLsh32x32:
return rewriteValueMIPS_OpLsh32x32(v)
case OpLsh32x64:
return rewriteValueMIPS_OpLsh32x64(v)
case OpLsh32x8:
return rewriteValueMIPS_OpLsh32x8(v)
case OpLsh8x16:
return rewriteValueMIPS_OpLsh8x16(v)
case OpLsh8x32:
return rewriteValueMIPS_OpLsh8x32(v)
case OpLsh8x64:
return rewriteValueMIPS_OpLsh8x64(v)
case OpLsh8x8:
return rewriteValueMIPS_OpLsh8x8(v)
case OpMIPSADD:
return rewriteValueMIPS_OpMIPSADD(v)
case OpMIPSADDconst:
return rewriteValueMIPS_OpMIPSADDconst(v)
case OpMIPSAND:
return rewriteValueMIPS_OpMIPSAND(v)
case OpMIPSANDconst:
return rewriteValueMIPS_OpMIPSANDconst(v)
case OpMIPSCMOVZ:
return rewriteValueMIPS_OpMIPSCMOVZ(v)
case OpMIPSCMOVZzero:
return rewriteValueMIPS_OpMIPSCMOVZzero(v)
case OpMIPSLoweredAtomicAdd:
return rewriteValueMIPS_OpMIPSLoweredAtomicAdd(v)
case OpMIPSLoweredAtomicStore:
return rewriteValueMIPS_OpMIPSLoweredAtomicStore(v)
case OpMIPSMOVBUload:
return rewriteValueMIPS_OpMIPSMOVBUload(v)
case OpMIPSMOVBUreg:
return rewriteValueMIPS_OpMIPSMOVBUreg(v)
case OpMIPSMOVBload:
return rewriteValueMIPS_OpMIPSMOVBload(v)
case OpMIPSMOVBreg:
return rewriteValueMIPS_OpMIPSMOVBreg(v)
case OpMIPSMOVBstore:
return rewriteValueMIPS_OpMIPSMOVBstore(v)
case OpMIPSMOVBstorezero:
return rewriteValueMIPS_OpMIPSMOVBstorezero(v)
case OpMIPSMOVDload:
return rewriteValueMIPS_OpMIPSMOVDload(v)
case OpMIPSMOVDstore:
return rewriteValueMIPS_OpMIPSMOVDstore(v)
case OpMIPSMOVFload:
return rewriteValueMIPS_OpMIPSMOVFload(v)
case OpMIPSMOVFstore:
return rewriteValueMIPS_OpMIPSMOVFstore(v)
case OpMIPSMOVHUload:
return rewriteValueMIPS_OpMIPSMOVHUload(v)
case OpMIPSMOVHUreg:
return rewriteValueMIPS_OpMIPSMOVHUreg(v)
case OpMIPSMOVHload:
return rewriteValueMIPS_OpMIPSMOVHload(v)
case OpMIPSMOVHreg:
return rewriteValueMIPS_OpMIPSMOVHreg(v)
case OpMIPSMOVHstore:
return rewriteValueMIPS_OpMIPSMOVHstore(v)
case OpMIPSMOVHstorezero:
return rewriteValueMIPS_OpMIPSMOVHstorezero(v)
case OpMIPSMOVWload:
return rewriteValueMIPS_OpMIPSMOVWload(v)
case OpMIPSMOVWreg:
return rewriteValueMIPS_OpMIPSMOVWreg(v)
case OpMIPSMOVWstore:
return rewriteValueMIPS_OpMIPSMOVWstore(v)
case OpMIPSMOVWstorezero:
return rewriteValueMIPS_OpMIPSMOVWstorezero(v)
case OpMIPSMUL:
return rewriteValueMIPS_OpMIPSMUL(v)
case OpMIPSNEG:
return rewriteValueMIPS_OpMIPSNEG(v)
case OpMIPSNOR:
return rewriteValueMIPS_OpMIPSNOR(v)
case OpMIPSNORconst:
return rewriteValueMIPS_OpMIPSNORconst(v)
case OpMIPSOR:
return rewriteValueMIPS_OpMIPSOR(v)
case OpMIPSORconst:
return rewriteValueMIPS_OpMIPSORconst(v)
case OpMIPSSGT:
return rewriteValueMIPS_OpMIPSSGT(v)
case OpMIPSSGTU:
return rewriteValueMIPS_OpMIPSSGTU(v)
case OpMIPSSGTUconst:
return rewriteValueMIPS_OpMIPSSGTUconst(v)
case OpMIPSSGTUzero:
return rewriteValueMIPS_OpMIPSSGTUzero(v)
case OpMIPSSGTconst:
return rewriteValueMIPS_OpMIPSSGTconst(v)
case OpMIPSSGTzero:
return rewriteValueMIPS_OpMIPSSGTzero(v)
case OpMIPSSLL:
return rewriteValueMIPS_OpMIPSSLL(v)
case OpMIPSSLLconst:
return rewriteValueMIPS_OpMIPSSLLconst(v)
case OpMIPSSRA:
return rewriteValueMIPS_OpMIPSSRA(v)
case OpMIPSSRAconst:
return rewriteValueMIPS_OpMIPSSRAconst(v)
case OpMIPSSRL:
return rewriteValueMIPS_OpMIPSSRL(v)
case OpMIPSSRLconst:
return rewriteValueMIPS_OpMIPSSRLconst(v)
case OpMIPSSUB:
return rewriteValueMIPS_OpMIPSSUB(v)
case OpMIPSSUBconst:
return rewriteValueMIPS_OpMIPSSUBconst(v)
case OpMIPSXOR:
return rewriteValueMIPS_OpMIPSXOR(v)
case OpMIPSXORconst:
return rewriteValueMIPS_OpMIPSXORconst(v)
case OpMod16:
return rewriteValueMIPS_OpMod16(v)
case OpMod16u:
return rewriteValueMIPS_OpMod16u(v)
case OpMod32:
return rewriteValueMIPS_OpMod32(v)
case OpMod32u:
return rewriteValueMIPS_OpMod32u(v)
case OpMod8:
return rewriteValueMIPS_OpMod8(v)
case OpMod8u:
return rewriteValueMIPS_OpMod8u(v)
case OpMove:
return rewriteValueMIPS_OpMove(v)
case OpMul16:
return rewriteValueMIPS_OpMul16(v)
case OpMul32:
return rewriteValueMIPS_OpMul32(v)
case OpMul32F:
return rewriteValueMIPS_OpMul32F(v)
case OpMul32uhilo:
return rewriteValueMIPS_OpMul32uhilo(v)
case OpMul64F:
return rewriteValueMIPS_OpMul64F(v)
case OpMul8:
return rewriteValueMIPS_OpMul8(v)
case OpNeg16:
return rewriteValueMIPS_OpNeg16(v)
case OpNeg32:
return rewriteValueMIPS_OpNeg32(v)
case OpNeg32F:
return rewriteValueMIPS_OpNeg32F(v)
case OpNeg64F:
return rewriteValueMIPS_OpNeg64F(v)
case OpNeg8:
return rewriteValueMIPS_OpNeg8(v)
case OpNeq16:
return rewriteValueMIPS_OpNeq16(v)
case OpNeq32:
return rewriteValueMIPS_OpNeq32(v)
case OpNeq32F:
return rewriteValueMIPS_OpNeq32F(v)
case OpNeq64F:
return rewriteValueMIPS_OpNeq64F(v)
case OpNeq8:
return rewriteValueMIPS_OpNeq8(v)
case OpNeqB:
return rewriteValueMIPS_OpNeqB(v)
case OpNeqPtr:
return rewriteValueMIPS_OpNeqPtr(v)
case OpNilCheck:
return rewriteValueMIPS_OpNilCheck(v)
case OpNot:
return rewriteValueMIPS_OpNot(v)
case OpOffPtr:
return rewriteValueMIPS_OpOffPtr(v)
case OpOr16:
return rewriteValueMIPS_OpOr16(v)
case OpOr32:
return rewriteValueMIPS_OpOr32(v)
case OpOr8:
return rewriteValueMIPS_OpOr8(v)
case OpOrB:
return rewriteValueMIPS_OpOrB(v)
case OpRound32F:
return rewriteValueMIPS_OpRound32F(v)
case OpRound64F:
return rewriteValueMIPS_OpRound64F(v)
case OpRsh16Ux16:
return rewriteValueMIPS_OpRsh16Ux16(v)
case OpRsh16Ux32:
return rewriteValueMIPS_OpRsh16Ux32(v)
case OpRsh16Ux64:
return rewriteValueMIPS_OpRsh16Ux64(v)
case OpRsh16Ux8:
return rewriteValueMIPS_OpRsh16Ux8(v)
case OpRsh16x16:
return rewriteValueMIPS_OpRsh16x16(v)
case OpRsh16x32:
return rewriteValueMIPS_OpRsh16x32(v)
case OpRsh16x64:
return rewriteValueMIPS_OpRsh16x64(v)
case OpRsh16x8:
return rewriteValueMIPS_OpRsh16x8(v)
case OpRsh32Ux16:
return rewriteValueMIPS_OpRsh32Ux16(v)
case OpRsh32Ux32:
return rewriteValueMIPS_OpRsh32Ux32(v)
case OpRsh32Ux64:
return rewriteValueMIPS_OpRsh32Ux64(v)
case OpRsh32Ux8:
return rewriteValueMIPS_OpRsh32Ux8(v)
case OpRsh32x16:
return rewriteValueMIPS_OpRsh32x16(v)
case OpRsh32x32:
return rewriteValueMIPS_OpRsh32x32(v)
case OpRsh32x64:
return rewriteValueMIPS_OpRsh32x64(v)
case OpRsh32x8:
return rewriteValueMIPS_OpRsh32x8(v)
case OpRsh8Ux16:
return rewriteValueMIPS_OpRsh8Ux16(v)
case OpRsh8Ux32:
return rewriteValueMIPS_OpRsh8Ux32(v)
case OpRsh8Ux64:
return rewriteValueMIPS_OpRsh8Ux64(v)
case OpRsh8Ux8:
return rewriteValueMIPS_OpRsh8Ux8(v)
case OpRsh8x16:
return rewriteValueMIPS_OpRsh8x16(v)
case OpRsh8x32:
return rewriteValueMIPS_OpRsh8x32(v)
case OpRsh8x64:
return rewriteValueMIPS_OpRsh8x64(v)
case OpRsh8x8:
return rewriteValueMIPS_OpRsh8x8(v)
case OpSelect0:
return rewriteValueMIPS_OpSelect0(v)
case OpSelect1:
return rewriteValueMIPS_OpSelect1(v)
case OpSignExt16to32:
return rewriteValueMIPS_OpSignExt16to32(v)
case OpSignExt8to16:
return rewriteValueMIPS_OpSignExt8to16(v)
case OpSignExt8to32:
return rewriteValueMIPS_OpSignExt8to32(v)
case OpSignmask:
return rewriteValueMIPS_OpSignmask(v)
case OpSlicemask:
return rewriteValueMIPS_OpSlicemask(v)
case OpSqrt:
return rewriteValueMIPS_OpSqrt(v)
case OpStaticCall:
return rewriteValueMIPS_OpStaticCall(v)
case OpStore:
return rewriteValueMIPS_OpStore(v)
case OpSub16:
return rewriteValueMIPS_OpSub16(v)
case OpSub32:
return rewriteValueMIPS_OpSub32(v)
case OpSub32F:
return rewriteValueMIPS_OpSub32F(v)
case OpSub32withcarry:
return rewriteValueMIPS_OpSub32withcarry(v)
case OpSub64F:
return rewriteValueMIPS_OpSub64F(v)
case OpSub8:
return rewriteValueMIPS_OpSub8(v)
case OpSubPtr:
return rewriteValueMIPS_OpSubPtr(v)
case OpTrunc16to8:
return rewriteValueMIPS_OpTrunc16to8(v)
case OpTrunc32to16:
return rewriteValueMIPS_OpTrunc32to16(v)
case OpTrunc32to8:
return rewriteValueMIPS_OpTrunc32to8(v)
case OpXor16:
return rewriteValueMIPS_OpXor16(v)
case OpXor32:
return rewriteValueMIPS_OpXor32(v)
case OpXor8:
return rewriteValueMIPS_OpXor8(v)
case OpZero:
return rewriteValueMIPS_OpZero(v)
case OpZeroExt16to32:
return rewriteValueMIPS_OpZeroExt16to32(v)
case OpZeroExt8to16:
return rewriteValueMIPS_OpZeroExt8to16(v)
case OpZeroExt8to32:
return rewriteValueMIPS_OpZeroExt8to32(v)
case OpZeromask:
return rewriteValueMIPS_OpZeromask(v)
}
return false
}
func rewriteValueMIPS_OpAdd16(v *Value) bool {
// match: (Add16 x y)
// cond:
// result: (ADD x y)
for {
x := v.Args[0]
y := v.Args[1]
v.reset(OpMIPSADD)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueMIPS_OpAdd32(v *Value) bool {
// match: (Add32 x y)
// cond:
// result: (ADD x y)
for {
x := v.Args[0]
y := v.Args[1]
v.reset(OpMIPSADD)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueMIPS_OpAdd32F(v *Value) bool {
// match: (Add32F x y)
// cond:
// result: (ADDF x y)
for {
x := v.Args[0]
y := v.Args[1]
v.reset(OpMIPSADDF)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueMIPS_OpAdd32withcarry(v *Value) bool {
b := v.Block
_ = b
// match: (Add32withcarry <t> x y c)
// cond:
// result: (ADD c (ADD <t> x y))
for {
t := v.Type
x := v.Args[0]
y := v.Args[1]
c := v.Args[2]
v.reset(OpMIPSADD)
v.AddArg(c)
v0 := b.NewValue0(v.Pos, OpMIPSADD, t)
v0.AddArg(x)
v0.AddArg(y)
v.AddArg(v0)
return true
}
}
func rewriteValueMIPS_OpAdd64F(v *Value) bool {
// match: (Add64F x y)
// cond:
// result: (ADDD x y)
for {
x := v.Args[0]
y := v.Args[1]
v.reset(OpMIPSADDD)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueMIPS_OpAdd8(v *Value) bool {
// match: (Add8 x y)
// cond:
// result: (ADD x y)
for {
x := v.Args[0]
y := v.Args[1]
v.reset(OpMIPSADD)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueMIPS_OpAddPtr(v *Value) bool {
// match: (AddPtr x y)
// cond:
// result: (ADD x y)
for {
x := v.Args[0]
y := v.Args[1]
v.reset(OpMIPSADD)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueMIPS_OpAddr(v *Value) bool {
// match: (Addr {sym} base)
// cond:
// result: (MOVWaddr {sym} base)
for {
sym := v.Aux
base := v.Args[0]
v.reset(OpMIPSMOVWaddr)
v.Aux = sym
v.AddArg(base)
return true
}
}
func rewriteValueMIPS_OpAnd16(v *Value) bool {
// match: (And16 x y)
// cond:
// result: (AND x y)
for {
x := v.Args[0]
y := v.Args[1]
v.reset(OpMIPSAND)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueMIPS_OpAnd32(v *Value) bool {
// match: (And32 x y)
// cond:
// result: (AND x y)
for {
x := v.Args[0]
y := v.Args[1]
v.reset(OpMIPSAND)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueMIPS_OpAnd8(v *Value) bool {
// match: (And8 x y)
// cond:
// result: (AND x y)
for {
x := v.Args[0]
y := v.Args[1]
v.reset(OpMIPSAND)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueMIPS_OpAndB(v *Value) bool {
// match: (AndB x y)
// cond:
// result: (AND x y)
for {
x := v.Args[0]
y := v.Args[1]
v.reset(OpMIPSAND)
v.AddArg(x)
v.AddArg(y)
return true
}
}
func rewriteValueMIPS_OpAtomicAdd32(v *Value) bool {
// match: (AtomicAdd32 ptr val mem)
// cond:
// result: (LoweredAtomicAdd ptr val mem)
for {
ptr := v.Args[0]
val := v.Args[1]
mem := v.Args[2]
v.reset(OpMIPSLoweredAtomicAdd)
v.AddArg(ptr)
v.AddArg(val)
v.AddArg(mem)
return true
}
}
func rewriteValueMIPS_OpAtomicAnd8(v *Value) bool {
b := v.Block
_ = b
config := b.Func.Config
_ = config
types := &b.Func.Config.Types
_ = types
// match: (AtomicAnd8 ptr val mem)
// cond: !config.BigEndian
// result: (LoweredAtomicAnd (AND <types.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <types.UInt32> (SLL <types.UInt32> (ZeroExt8to32 val) (SLLconst <types.UInt32> [3] (ANDconst <types.UInt32> [3] ptr))) (NORconst [0] <types.UInt32> (SLL <types.UInt32> (MOVWconst [0xff]) (SLLconst <types.UInt32> [3] (ANDconst <types.UInt32> [3] ptr))))) mem)
for {
ptr := v.Args[0]
val := v.Args[1]
mem := v.Args[2]
if !(!config.BigEndian) {
break
}
v.reset(OpMIPSLoweredAtomicAnd)
v0 := b.NewValue0(v.Pos, OpMIPSAND, types.UInt32Ptr)
v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
v1.AuxInt = ^3
v0.AddArg(v1)
v0.AddArg(ptr)
v.AddArg(v0)
v2 := b.NewValue0(v.Pos, OpMIPSOR, types.UInt32)
v3 := b.NewValue0(v.Pos, OpMIPSSLL, types.UInt32)
v4 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
v4.AddArg(val)
v3.AddArg(v4)
v5 := b.NewValue0(v.Pos, OpMIPSSLLconst, types.UInt32)
v5.AuxInt = 3
v6 := b.NewValue0(v.Pos, OpMIPSANDconst, types.UInt32)
v6.AuxInt = 3
v6.AddArg(ptr)
v5.AddArg(v6)
v3.AddArg(v5)
v2.AddArg(v3)
v7 := b.NewValue0(v.Pos, OpMIPSNORconst, types.UInt32)
v7.AuxInt = 0
v8 := b.NewValue0(v.Pos, OpMIPSSLL, types.UInt32)
v9 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
v9.AuxInt = 0xff
v8.AddArg(v9)
v10 := b.NewValue0(v.Pos, OpMIPSSLLconst, types.UInt32)
v10.AuxInt = 3
v11 := b.NewValue0(v.Pos, OpMIPSANDconst, types.UInt32)
v11.AuxInt = 3
v11.AddArg(ptr)
v10.AddArg(v11)
v8.AddArg(v10)
v7.AddArg(v8)
v2.AddArg(v7)
v.AddArg(v2)
v.AddArg(mem)
return true
}
// match: (AtomicAnd8 ptr val mem)
// cond: config.BigEndian
// result: (LoweredAtomicAnd (AND <types.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <types.UInt32> (SLL <types.UInt32> (ZeroExt8to32 val) (SLLconst <types.UInt32> [3] (ANDconst <types.UInt32> [3] (XORconst <types.UInt32> [3] ptr)))) (NORconst [0] <types.UInt32> (SLL <types.UInt32> (MOVWconst [0xff]) (SLLconst <types.UInt32> [3] (ANDconst <types.UInt32> [3] (XORconst <types.UInt32> [3] ptr)))))) mem)
for {
ptr := v.Args[0]
val := v.Args[1]
mem := v.Args[2]
if !(config.BigEndian) {
break
}
v.reset(OpMIPSLoweredAtomicAnd)
v0 := b.NewValue0(v.Pos, OpMIPSAND, types.UInt32Ptr)
v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
v1.AuxInt = ^3
v0.AddArg(v1)
v0.AddArg(ptr)
v.AddArg(v0)
v2 := b.NewValue0(v.Pos, OpMIPSOR, types.UInt32)
v3 := b.NewValue0(v.Pos, OpMIPSSLL, types.UInt32)
v4 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
v4.AddArg(val)
v3.AddArg(v4)
v5 := b.NewValue0(v.Pos, OpMIPSSLLconst, types.UInt32)
v5.AuxInt = 3
v6 := b.NewValue0(v.Pos, OpMIPSANDconst, types.UInt32)
v6.AuxInt = 3
v7 := b.NewValue0(v.Pos, OpMIPSXORconst, types.UInt32)
v7.AuxInt = 3
v7.AddArg(ptr)
v6.AddArg(v7)
v5.AddArg(v6)
v3.AddArg(v5)
v2.AddArg(v3)
v8 := b.NewValue0(v.Pos, OpMIPSNORconst, types.UInt32)
v8.AuxInt = 0
v9 := b.NewValue0(v.Pos, OpMIPSSLL, types.UInt32)
v10 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
v10.AuxInt = 0xff
v9.AddArg(v10)
v11 := b.NewValue0(v.Pos, OpMIPSSLLconst, types.UInt32)
v11.AuxInt = 3
v12 := b.NewValue0(v.Pos, OpMIPSANDconst, types.UInt32)
v12.AuxInt = 3
v13 := b.NewValue0(v.Pos, OpMIPSXORconst, types.UInt32)
v13.AuxInt = 3
v13.AddArg(ptr)
v12.AddArg(v13)
v11.AddArg(v12)
v9.AddArg(v11)
v8.AddArg(v9)
v2.AddArg(v8)
v.AddArg(v2)
v.AddArg(mem)
return true
}
return false
}
func rewriteValueMIPS_OpAtomicCompareAndSwap32(v *Value) bool {
// match: (AtomicCompareAndSwap32 ptr old new_ mem)
// cond:
// result: (LoweredAtomicCas ptr old new_ mem)
for {
ptr := v.Args[0]
old := v.Args[1]
new_ := v.Args[2]
mem := v.Args[3]
v.reset(OpMIPSLoweredAtomicCas)
v.AddArg(ptr)
v.AddArg(old)
v.AddArg(new_)
v.AddArg(mem)
return true
}
}
func rewriteValueMIPS_OpAtomicExchange32(v *Value) bool {
// match: (AtomicExchange32 ptr val mem)
// cond:
// result: (LoweredAtomicExchange ptr val mem)
for {
ptr := v.Args[0]
val := v.Args[1]
mem := v.Args[2]
v.reset(OpMIPSLoweredAtomicExchange)
v.AddArg(ptr)
v.AddArg(val)
v.AddArg(mem)
return true
}
}
func rewriteValueMIPS_OpAtomicLoad32(v *Value) bool {
// match: (AtomicLoad32 ptr mem)
// cond:
// result: (LoweredAtomicLoad ptr mem)
for {
ptr := v.Args[0]
mem := v.Args[1]
v.reset(OpMIPSLoweredAtomicLoad)
v.AddArg(ptr)
v.AddArg(mem)
return true
}
}
func rewriteValueMIPS_OpAtomicLoadPtr(v *Value) bool {
// match: (AtomicLoadPtr ptr mem)
// cond:
// result: (LoweredAtomicLoad ptr mem)
for {
ptr := v.Args[0]
mem := v.Args[1]
v.reset(OpMIPSLoweredAtomicLoad)
v.AddArg(ptr)
v.AddArg(mem)
return true
}
}
func rewriteValueMIPS_OpAtomicOr8(v *Value) bool {
b := v.Block
_ = b
config := b.Func.Config
_ = config
types := &b.Func.Config.Types
_ = types
// match: (AtomicOr8 ptr val mem)
// cond: !config.BigEndian
// result: (LoweredAtomicOr (AND <types.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <types.UInt32> (ZeroExt8to32 val) (SLLconst <types.UInt32> [3] (ANDconst <types.UInt32> [3] ptr))) mem)
for {
ptr := v.Args[0]
val := v.Args[1]
mem := v.Args[2]
if !(!config.BigEndian) {
break
}
v.reset(OpMIPSLoweredAtomicOr)
v0 := b.NewValue0(v.Pos, OpMIPSAND, types.UInt32Ptr)
v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
v1.AuxInt = ^3
v0.AddArg(v1)
v0.AddArg(ptr)
v.AddArg(v0)
v2 := b.NewValue0(v.Pos, OpMIPSSLL, types.UInt32)
v3 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
v3.AddArg(val)
v2.AddArg(v3)
v4 := b.NewValue0(v.Pos, OpMIPSSLLconst, types.UInt32)
v4.AuxInt = 3
v5 := b.NewValue0(v.Pos, OpMIPSANDconst, types.UInt32)
v5.AuxInt = 3
v5.AddArg(ptr)
v4.AddArg(v5)
v2.AddArg(v4)
v.AddArg(v2)
v.AddArg(mem)
return true
}
// match: (AtomicOr8 ptr val mem)
// cond: config.BigEndian
// result: (LoweredAtomicOr (AND <types.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <types.UInt32> (ZeroExt8to32 val) (SLLconst <types.UInt32> [3] (ANDconst <types.UInt32> [3] (XORconst <types.UInt32> [3] ptr)))) mem)
for {
ptr := v.Args[0]
val := v.Args[1]
mem := v.Args[2]
if !(config.BigEndian) {
break
}
v.reset(OpMIPSLoweredAtomicOr)
v0 := b.NewValue0(v.Pos, OpMIPSAND, types.UInt32Ptr)
v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
v1.AuxInt = ^3
v0.AddArg(v1)
v0.AddArg(ptr)
v.AddArg(v0)
v2 := b.NewValue0(v.Pos, OpMIPSSLL, types.UInt32)
v3 := b.NewValue0(v.Pos, OpZeroExt8to32, types.UInt32)
v3.AddArg(val)
v2.AddArg(v3)
v4 := b.NewValue0(v.Pos, OpMIPSSLLconst, types.UInt32)
v4.AuxInt = 3
v5 := b.NewValue0(v.Pos, OpMIPSANDconst, types.UInt32)
v5.AuxInt = 3
v6 := b.NewValue0(v.Pos, OpMIPSXORconst, types.UInt32)
v6.AuxInt = 3
v6.AddArg(ptr)
v5.AddArg(v6)
v4.AddArg(v5)
v2.AddArg(v4)
v.AddArg(v2)
v.AddArg(mem)
return true
}
return false
}
func rewriteValueMIPS_OpAtomicStore32(v *Value) bool {
// match: (AtomicStore32 ptr val mem)
// cond:
// result: (LoweredAtomicStore ptr val mem)
for {
ptr := v.Args[0]
val := v.Args[1]
mem := v.Args[2]
v.reset(OpMIPSLoweredAtomicStore)
v.AddArg(ptr)
v.AddArg(val)
v.AddArg(mem)
return true
}
}
func rewriteValueMIPS_OpAtomicStorePtrNoWB(v *Value) bool {
// match: (AtomicStorePtrNoWB ptr val mem)
// cond:
// result: (LoweredAtomicStore ptr val mem)
for {
ptr := v.Args[0]
val := v.Args[1]
mem := v.Args[2]
v.reset(OpMIPSLoweredAtomicStore)
v.AddArg(ptr)
v.AddArg(val)
v.AddArg(mem)
return true
}
}
func rewriteValueMIPS_OpAvg32u(v *Value) bool {
b := v.Block
_ = b
// match: (Avg32u <t> x y)
// cond:
// result: (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
for {
t := v.Type
x := v.Args[0]
y := v.Args[1]
v.reset(OpMIPSADD)
v0 := b.NewValue0(v.Pos, OpMIPSSRLconst, t)
v0.AuxInt = 1
v1 := b.NewValue0(v.Pos, OpMIPSSUB, t)
v1.AddArg(x)
v1.AddArg(y)
v0.AddArg(v1)
v.AddArg(v0)
v.AddArg(y)
return true
}
}
func rewriteValueMIPS_OpBitLen32(v *Value) bool {
b := v.Block
_ = b
types := &b.Func.Config.Types
_ = types
// match: (BitLen32 <t> x)
// cond:
// result: (SUB (MOVWconst [32]) (CLZ <t> x))
for {
t := v.Type
x := v.Args[0]
v.reset(OpMIPSSUB)
v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, types.UInt32)
v0.AuxInt = 32
v.AddArg(v0)
v1 := b.NewValue0(v.Pos, OpMIPSCLZ, t)
v1.AddArg(x)
v.AddArg(v1)